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Awide Labs

Blog

Engineering notes, benchmarks, release reports, and company news from the team building the Awide Data Processor.

Release KV Cache vLLM NVLink

New release: MiniMax M3, the Kimi K3 architecture and NVLink fan-out

MiniMax M3 on vLLM 0.28 verified on hardware with a full regression, support for the Kimi K3 architecture on vLLM 0.29, NVLink fan-out of cache restores, and the first steps toward a connector that new models no longer break.

September 22, 2026
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Release KV Cache vLLM

New ADP KV cache connector release: GLM-5.3 and DeepSeek-V4-Flash on vLLM 0.28/0.29

A new release brings hardware-verified support for GLM-5.3 and DeepSeek-V4-Flash on vLLM 0.28/0.29, deployment tooling, and improved stability for context-heavy inference workloads.

September 14, 2026
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Release KV Cache HMA MTP vLLM

New ADP KV cache connector release: hybrid Mamba and MTP on vLLM 0.26

A new release of the ADP KV cache connector: vLLM 0.26, plus the model families that used to break KV offload — hybrid Mamba (HMA) and multi-token prediction (MTP).

September 2, 2026
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Company Acquisition

Awide Labs Acquires Pliops Technology Portfolio

Awide Labs has acquired the intellectual property license and manufacturing rights for the Pliops technology portfolio, bringing hardware-accelerated data processing and key-value technology together with its PostgreSQL expertise and AI roadmap.

May 18, 2026
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Awide Labs delivers cutting-edge hardware-accelerated solutions for AI inference and storage, powered by the Awide Data Processor (ADP).

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info@awide.io
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